Government Policies, Initiatives, and Schemes for Semiconductor Industry in India
Semiconductor policies in India focus on creating a domestic manufacturing ecosystem, reducing import reliance, and positioning the country as an alternative hub for global electronics supply chains.
India Semiconductor Mission and Phase Evolution
The overarching administrative framework is anchored by the India Semiconductor Mission, operating as an independent specialized division within the Ministry of Electronics and Information Technology.
Semicon India Programme 1.0
- Launched in December 2021 with an initial fiscal outlay of seventy-six thousand crore rupees to offer financial support for silicon fabs, display fabs, and compound semiconductors.
- Provided up to fifty percent of capital expenditure support on a pari-passu basis for approved manufacturing and packaging units.
- Facilitated the approval of multiple semiconductor plants across states like Gujarat, Odisha, and Assam, covering outsourced assembly, testing, marking, and packaging facilities.
Semicon India Programme 2.0
- Approved by the Union Cabinet with an expanded financial outlay of one lakh twenty-seven thousand five hundred crore rupees to deepen technological capabilities.
- Focuses on fostering domestic semiconductor intellectual property, specialized equipment production, raw material supply chains, and advanced packaging technologies.
- Tailors capital support structures by offering forty percent capital expenditure backing for complementary metal-oxide-semiconductor silicon fabs and thirty-five percent for compound semiconductor and advanced packaging units.
Core Incentive Schemes and Support Pillars
The structural policy design targets every tier of the microchip manufacturing lifecycle, spanning raw design to final consumer deployment.
Design Linked Incentive Scheme
- Nurtures domestic startups and micro, small, and medium enterprises by providing seed capital, risk assistance, and deployment-linked incentives.
- Offsets high expenses associated with electronic design automation tools and chip tape-outs to build a vibrant domestic fabless ecosystem.
Packaging and Testing Support
- Encourages the establishment of outsourced assembly, testing, marking, and packaging units to bridge domestic capacity gaps.
- Promotes advanced heterogeneous integration and three-dimensional packaging facilities necessary for high-performance computing, artificial intelligence, and telecommunication hardware.
Comparative Overview of Semiconductor Incentive Frameworks
| Programme Phase | Fiscal Outlay | Primary Focus Areas | Capital Support Structure |
| Semicon 1.0 | Seventy-six thousand crore rupees | Basic silicon fabs, display units, and standard ATMP facilities | Up to fifty percent of project capital expenditure |
| Semicon 2.0 | One lakh twenty-seven thousand five hundred crore rupees | Specialized equipment, design intellectual property, and advanced packaging | Graded support ranging from twenty-five to forty percent based on technology tier |
- The first commercial semiconductor assembly and test facility under the mission commenced operations in Sanand, Gujarat.
- State governments complement central incentives through dedicated regional policies, offering land subsidies, power tariff concessions, and stamp duty exemptions.
- Academic partnerships with technical institutions support specialized training programs to produce skilled cleanroom engineers and VLSI design professionals.
Originally written on
December 15, 2015
and last modified on
August 14, 2026.
