Design Linked Incentive Scheme Strengthens India’s Semiconductor Design Ecosystem

India is accelerating its semiconductor ambitions as chips become indispensable for healthcare, transport, communications, defence, space, and digital infrastructure. With rising global demand and fragile supply chains concentrated in limited geographies, India is positioning itself as a strategic and reliable player through focused policy intervention, ecosystem building, and technology-led self-reliance.

Why Fabless Chip Design Matters

Fabless semiconductor design sits at the most strategic layer of the global electronics value chain. While fabrication and assembly add scale, over half of a chip’s value lies in design and intellectual property. Strong fabless capability enables ownership of core technologies, reduces import dependence, attracts manufacturing, and delivers long-term technological leadership. Without indigenous chip design, domestic electronics manufacturing remains dependent on foreign IP and critical components.

Design Linked Incentive Scheme Framework

The Design Linked Incentive (DLI) Scheme, implemented by the “Ministry of Electronics and Information Technology” under the Semicon India Programme, is central to building India’s fabless ecosystem. It supports startups, MSMEs and domestic companies across the full semiconductor design lifecycle, covering ICs, chipsets, SoCs, systems and IP cores. The scheme offers reimbursement of up to 50% of eligible design expenditure, capped at ₹15 crore, along with deployment-linked incentives of 6% to 4% of net sales for five years, subject to defined thresholds.

Design Infrastructure and Ecosystem Enablement

A key strength of the DLI Scheme is shared national infrastructure. The ChipIN Centre, established by “C-DAC”, provides access to advanced Electronic Design Automation tools, IP core repositories, MPW prototyping, and post-silicon validation. Since December 2021, about one lakh engineers and students across 400 organisations have accessed these facilities. The national EDA grid has recorded over 54 lakh hours of usage by supported startups, reflecting strong adoption and reduced entry barriers.

Imporatnt Facts for Exams

• DLI Scheme operates under the Semicon India Programme.
• Design contributes over 50% of semiconductor value.
• ChipIN Centre provides shared EDA and prototyping support.
• Semicon India Programme outlay is ₹76,000 crore.

From Design to Silicon: Outcomes and Success Stories

Under the DLI Scheme, 24 chip design projects have been sanctioned across domains such as surveillance, drones, microprocessors, satellite communications, and IoT. Tangible outcomes include 16 tape-outs, six fabricated chips, ten patents, over 140 reusable IP cores, and the training of more than 1,000 specialised engineers. Indian startups such as Vervesemi Microelectronics, InCore Semiconductors, Netrasemi, Aheesa Digital Innovations and AAGYAVISION demonstrate how indigenous designs are progressing from concept to silicon-proven, market-ready products. These advances signal India’s transition from dependence to design-led semiconductor self-reliance and growing global competitiveness.