Digital India RISC-V (DIR-V) program

The launch of the Digital India RISC-V (DIR-V) program was announced on 27th April 2022 by the government of India with the aim of creating Microprocessors for the country’s and the world’s future and to achieve industry-grade commercial silicon and design for the next generation of microprocessors by the month of December 2023.

Overview:

  • RISC-V is an open and free ISA that will enable a new era of processor innovation through collaboration.
  • This initiative is in line with the government’s ambition toward Atmanirbhar Bharat.

Partnerships for DIR-V

DIR-V will be witnessing partnerships between academia, start-ups, and multinationals with the aim of making India not a talent hub of RISC-V as well as a supplier of RISC-V SoC (System on Chips) to the world for mobile devices, servers, IoT, automotive, microcontrollers, etc.

Blueprint unveiled

Rajeev Chandrasekhar, Minister of State for Electronics & Information Technology and Skill Development & Entrepreneurship unveiled the blueprint for the roadmap of implementation and design of the DIR-V Program with the VEGA Processor by C-DAC and the SHAKTI Processor by IIT Madras. Along with this, the strategic roadmap for the country’s semiconductor innovation and design to catalyze the semiconductor ecosystem was also unveiled.

Members

Ministry of Electronics and IT has plans to join the RISC-V International as a premier board member to contribute, collaborate, and advocate India’s expertise with other global leaders of RISC-V. IIT Madras’s director, Professor V. Kamakoti will be the Chief Architect and the program manager will be S. Krishnakumar Rao of the DIR-V Program.

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