BEL Recruitment 2019: 05 Vacancies
Bharat Electronics Limited has issued notifications for recruiting eligible candidates to the posts of Senior Engineer in E-III Grade on Fixed Tenure basis for a period of Five (05) years. Please find detailed information regarding the vacancies below.
Important Dates
Last date for receipt of online application: 10.04.2019 till 1700 hrs.
About Vacancies
Post: Senior Engineer
Vacancies: 05
How to Apply
Interested candidates need to download the application by visiting the Official Website. The duly filled in application will need to be sent to the following address:
Sr Dy General Manager (HR),
Bharat Electronics Limited,
I.E.Nacharam,
Hyderabad – 500076
Essential Qualification
- BE / B Tech in Electronics & Communications Engineering from any AICTE approved institution with First Class for General & OBC candidates and Pass for SC/ST/PWD candidates.
- 4 years of post qualification experience as Embedded Engineer in Research Labs / Govt / PSUs / Reputed MNCs / Others.
- Design and Development of High Speed Digital Hardware based on FPGAs, Microprocessor, DSP Processors & Microcontrollers
- Knowledge in Signal Integrity, Thermal & Power integrity analysis.
- Full Understanding of Digital design methodologies and tools including RTL coding in VHDL/Verilog, Simulation, Synthesis, Static timing analysis, timing closure and Verification& validation on Hardware.
- Knowledge in interfacing DDR/QDR/SDRAM memories, RF ADCs and other high speed serial interfaces like SRIO, JESD204B etc.
- Good working knowledge on FPGA architectures, DSP Processor and PowerPC architectures.
- Good working knowledge in Embedded ‘C’, RTOS (VxWorks) and device driver development.
- Good knowledge on High Speed Communication Protocols (PCIe, cPCI,VME,VPX, Gigabit Ethernet, Optical protocols)
- Good working knowledge in Matlab, Simulink / Labview in the application areasSignal processing algorithms development, Data processing.
- Working knowledge in Xilinx ISE/Vivado tools and Modelsim simulation tools.
- Knowledge in RF basics and usage of test instruments.
Selection Procedure
Selection of candidates for all the posts would be made on the basis of the performance of the eligible candidates in the following:
- Written Test (questions from basic Engineering subjects, in the respective disciplines/specializations and General Aptitude)
- Interview
Age
Minimum: 18 years
Maximum: 32 years
Cut Off Date: 31.03.2019
Upper Age limit is relaxable by:
3 years for OBC (Non-Creamy Layer).
5 years for SC/ST candidates.
Persons with Disabilities Candidates: 10 years
Fee
Unreserved/OBC candidates: Rs 500
SC/ST/PwD candidates: Nil
Fee has to be paid by clicking the following link.
Other Information
Pay Scale
Candidates selected against the above position will be placed in E-III Grade (Senior Engineer), at the minimum of the pay scale of Rs.50,000-3%-1,60,000.
Approx CTC is 13 lakhs p.a.